A Tx IBIS-AMI model with an FFE and LPF can be specified by listing various requirements in four specific steps.<\/p>\n
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- General information: For the model name and intended usage for bit rate<\/li>\n
- IBIS data: For the model IBIS analog out buffer characteristics.<\/li>\n
- Jitter data. For the model data jitter characteristics.<\/li>\n
- FFE + LPF data. For the model FFE and LPF characteristics.<\/li>\n
- Complete and send us your model specification.<\/li>\n<\/ol>\n
Each of these model specification steps are discussed here in detail.\u00a0 Go back to the prior page to start entering your model specification data.\u00a0 Go back..<\/a>.<\/p>\n
1. General information for a Tx IBIS-AMI model<\/span><\/strong><\/h1>\n
It is convenient to start by giving a name to your model.\u00a0 Often this can be a composite string composed of your company name and the associated Tx HSD IC part or application.<\/p>\n
For example, a typical model name has this construction:<\/p>\n
<my_company>_<part_number>_<application><\/p>\n
such as:<\/p>\n
HSD_A2357_PCIe3<\/p>\n
The nominal bit rate should also be listed, though the model will automatically adjust itself for other bit rates.<\/p>\n
For example, for PCIe3, the nominal bit rate is 8 Gbps.<\/p>\n
2. IBIS data for a Tx IBIS-AMI model<\/strong><\/h1>\n
A Tx HSD IC often has its output buffer modeled based on the industry IBIS standard<\/a>.<\/p>\n
Since our Tx model is intended for use in a Channel Simulator, only a subset of the IBIS standard is applicable. \u00a0A Channel Simulator is defined for achieving fast simulation speed for millions or more bits compared to industry standard SPICE based circuit transient simulation.<\/p>\n
Based on industry conventions, a Channel Simulator will only use linear characteristics from a defined IBIS buffer.\u00a0 If the IBIS buffer model contains any nonlinearities, then the Channel Simulator will determine the best fit for linear characteristic to be used with the Channel Simulation.\u00a0 If any actual nonlinearities are intended to be associated with the Tx model then they should be defined in the AMI portion of an IBIS-AMI model and not in the IBIS portion.<\/p>\n
In general, the Tx output IBIS buffer for use with a Channel Simulator has this schematic view:
\n![\"Screen](\"https:\/\/www.serdesdesign.com\/home\/wp-content\/uploads\/2015\/09\/Screen-Shot-2015-09-08-at-11.54.56-AM.png\")
<\/a><\/p>\nThis schematic is a representation for a Tx HSD IC output buffer that has differential output pins intended for use with a differential channel.<\/p>\n
The IBIS standard defines these specific characteristics.<\/p>\n
C_pkg:\u00a0 default packaging capacitance of the component pins.<\/p>\n
L_pkg: default packaging inductance of the component pins.<\/p>\n
R_pkg:\u00a0 default packaging resistance of the component pins.<\/p>\n
C_comp:\u00a0 defines die capacitance and should not include the capacitance of the package.<\/p>\n
Pullup:\u00a0 defines the I-V tables of the pullup structures of an output buffer.<\/p>\n
Pulldown:\u00a0 defines the I-V tables of the pulldown structures of an output buffer.<\/p>\n
Rise time (dV\/dt_r):\u00a0 defines the rise time of a buffer. The ramp rate does not include packaging but does include the effects of the C_comp parameter.<\/p>\n
Fall time (dV\/dt_f):\u00a0 defines the rise time of a buffer. The ramp rate does not include packaging but does include the effects of the C_comp parameter.<\/p>\n
The rise and fall time is defined as the time it takes the output to go from 20% to 80% of its final value. The ramp rate is defined as:<\/p>\n
![\"rise_fall_time_equation\"](\"https:\/\/www.serdesdesign.com\/home\/wp-content\/uploads\/2015\/09\/rise_fall_time_equation.png\")
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The ramp rate must be specified as an explicit fraction and must not be reduced.<\/p>\n
For example:\u00a0 1.0 \/ 1e-12<\/p>\n
For the above parameters, the IBIS buffer specification includes the ability to list their typical, minimum and maximum values.<\/p>\n
3. Jitter data for a Tx IBIS-AMI model<\/strong><\/h1>\n
A Tx HSD IC often adds jitter to its input data.\u00a0 Jitter can be have many different characteristics.<\/p>\n
One view of the different constituent components to total jitter is seen in this classification of jitter types.<\/p>\n
![\"jitter_tree_for_classification_of_jitter\"](\"https:\/\/www.serdesdesign.com\/home\/wp-content\/uploads\/2015\/09\/jitter_tree_for_classification_of_jitter.png\")
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Based on the industry IBIS-AMI standard, a Tx model can have these associated jitter characteristics:<\/p>\n
Time(n) is the time of the nth clock modified when creating input waveforms for the Tx.<\/p>\n
Random (Tx_Rj)<\/strong>: Definition: The standard deviation of a white Gaussian phase noise process at the transmitter which is to be added to the behavior implemented by the EDA tool by modifying the stimulus input or by post processing the simulation results. Entries are assumed to be in units of seconds when declared as Type Float.<\/p>\n
Time(n) = n * bit_time + Tx_Rj * gaussian_rand()<\/p>\n
Where gaussian_rand() is a function that returns floating point numbers between -inf and +inf. The distribution of these numbers shall be a white Gaussian distribution centered at 0.0 with a \u00a0standard deviation of 1.0. The EDA tool can protect against abs(Tx_Rj*gaussian_rand()) > 0.5UI.<\/p>\n
Deterministic (Tx_Dj):<\/u><\/strong> Definition: The worst case half the peak to peak variation at the transmitter implemented by the EDA tool by modifying the stimulus input or by post processing the simulation results. Tx_Dj shall include all deterministic and uncorrelated bounded jitter that is not accounted for by Tx_DCD, and Tx_Sj. Entries are assumed to be in units of seconds when declared as Type Float.<\/p>\n
Time(n) = n * bit_time + 2.0 * Tx_Dj * rand()<\/p>\n
Where rand() is a function that returns floating point numbers between -0.5 and +0.5 with white uniform distribution.<\/p>\n
Duty Cycle Distortion (Tx_DCD):<\/u><\/strong>\u00a0 Definition: Tx_DCD (Transmit Duty Cycle Distortion) defines half the peak to peak clock duty cycle distortion to be added to the behavior implemented by the EDA tool by modifying the stimulus input or by post processing the simulation.<\/p>\n
Time(n) = n * bit_time + Tx_DCD * (-1.0)^n<\/p>\n
Periodic (Tx_Sj, Tx_Sj_Frequency):\u00a0 <\/u><\/strong><\/p>\n
Time(n) = n * bit_time + Tx_Sj * sin( n * bit_time * 2.0 * Pi * Tx_Sj_Frequency)<\/p>\n
Tx_Sj \u00a0Definition: Half the peak to peak amplitude of a sinusoidal jitter which is to be added to the behavior implemented directly by the transmitter model.<\/p>\n
Usage Rules: If Tx_Sj_Frequency is not assigned (either in the model or by the user), Tx_Sj should be ignored. Entries are assumed to be in units of seconds when declared as Type Float.<\/p>\n
Tx_Sj_Frequency\u00a0Definition: The frequency, in hertz, of the sinusoidal jitter at the transmitter.<\/p>\n
Usage Rules: If Tx_Sj_Frequency is not assigned (either in the model or by the user), Tx_Sj should be ignored.<\/p>\n
The total jitter usable with a Channel Simulation should be less than 1\/2 UI where UI = 1\/(data bit time) in seconds.\u00a0 Since Rj is unbounded, the Channel Simulator limits Rj to 1\/2 UI.<\/p>\n
4. FFE and LPF data for a Tx IBIS-AMI model<\/u><\/strong><\/h1>\n
For a general aid to understanding an FFE see our FFE Analysis Tool<\/a>.<\/p>\n
Here, the discussion is focused on the FFE and LPF data to be entered for the Tx IBIS-AMI model.<\/p>\n
Data can be entered for the FFE and the LPF.\u00a0 For most data, one can enter data for typical, slow and fast process corners.\u00a0 The actual use of <typ>, <slow>, <fast> is carried out by the EDA tool based on its Channel Simulator corner setting.<\/p>\n
For the FFE, data is entered for the pre-cursor and post-cursor values.\u00a0 For example, values for PreCursor1TypDefault, PostCursor1TypDefault, and PostCursor2TypDefault.\u00a0 One can define as many pre-cursors and post-cursors as desired.\u00a0 For each pre-cursor and post-cursor, one enters the default value and a list of values for each process corner.\u00a0 The lists define allowed values.\u00a0 For example, values for PreCursors1Typ, PostCursors1Typ, and PostCursors2Typ are list parameter.\u00a0 The default value is used for the Channel Simulation.<\/p>\n