Tools, Technologies and Training for High Speed Digital SerDes System Designers

References

Links on this page will take you to articles posted on the web on topics that are relevant to SerDes system design.

Let us know if there are other links you would like to add to this list.

IBIS Version 7.0 was ratified by the IBIS Open Forum on March 15, 2019, with inclusion of Rx to Tx back channel support.

IBIS Version 6.1 was ratified by the IBIS Open Forum on September 11, 2015, with more clarifications and extensions to the AMI format, including support for PAM4 SerDes systems.

IBIS Version 6.0 was ratified by the IBIS Open Forum on September 20, 2013, with more clarifications and extensions to the AMI format, including support for SerDes system redrivers and retimers.

Touchstone 2.0 file format specification for representing the frequency domain characteristics for N-port high frequency structures. Only the 1.0 file format described in the file is supported in the serdesdesign.com tools.

1. Topics on High Speed Links – Introduction
2. Channel Components, Wires, & Transmission Lines
3. Transmission Lines
4. Transmission Line Examples
5. Interconnect Measurement Techniques
6. S-Parameter Channel Examples
7. Channel Time-Domain Response
8. Channel Pulse Model
9. Modulation Schemes
10. Termination & Transmitter Circuits
11. Transmitter Circuits
12. TX Multiplexer Circuits
13. RX Circuits
14. RX Comparator Circuits
15. RX Circuits
16. Equalization Introduction
17. TX FIR Equalization
18. RX FIR & CTLE Equalization
19. RX DFE Equalization
20. Noise Sources
21. Crosstalk
22. ISI and Random Noise
23. Jitter
24. Jitter Budget & Stateye
25. Clocking Architectures
26. Phase-Locked Loops
27. PLL Circuits
28. VCOs
29. PLL Wrap-Up
30. CDRs
31. CDR Architectures
32. CDR Wrap-Up
33. Optical I/O

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