Tools, Technologies and Training for High Speed Digital SerDes System Designers

Keysight 2020 Tokyo Forum – Automated IBIS-AMI Modeling

High speed digital (HSD) integrated circuits (ICs) are used in Serializer/Deserializer (SerDes) systems. In Channel Simulation for such systems, transmit (Tx) and receive (Rx) circuits must exist as IBIS-AMI models. Advanced automated model generation using the SerDesDesign library in the Keysight SystemVue product is discussed in this paper. See the full article: Keysight 2020 Tokyo… Continue Reading

Channel Simulation PAM4 System MultiCore Tests

High speed digital (HSD) integrated circuits (ICs) are used in Serializer/Deserializer (SerDes) systems. In such systems, a Channel Simulator is used to simulate SerDes systems based on the IBIS-AMI standard. This paper discusses the use of multi-core CPUs to significantly reduce PAM4 system simulation time required for a Channel Simulation to achieve accurate BER results… Continue Reading

Channel Simulation NRZ System MultiCore Tests

High speed digital (HSD) integrated circuits (ICs) are used in Serializer/Deserializer (SerDes) systems. In such systems, a Channel Simulator is used to simulate SerDes systems based on the IBIS-AMI standard. This paper discusses the use of multi-core CPUs to significantly reduce NRZ system simulation time required for a Channel Simulation to achieve accurate BER results… Continue Reading

Channel Simulation MultiCore Calibration Tests

High speed digital (HSD) integrated circuits (ICs) are used in Serializer/Deserializer (SerDes) systems. In such systems, a Channel Simulator is used to simulate SerDes systems based on the IBIS-AMI standard. This paper discusses validation of the use of multi-core CPUs to significantly reduce the simulation time required for a Channel Simulation to achieve accurate BER… Continue Reading

Channel Simulation BER Extrapolation

High speed digital (HSD) integrated circuits (ICs) are used in Serializer/Deserializer (SerDes) systems. In such systems, a Channel Simulator is used to simulate SerDes systems based on the IBIS-AMI standard. This paper discusses BER extrapolation to achieve BER metrics down to 1.0e-16 and lower in Channel Simulations. See the full article: Channel_Simulation_BER_Extrapolation.pdf About John Baprawski… Continue Reading

Extracting Modeling Data for a Rx CTLE Circuit

High speed digital (HSD) integrated circuits (ICs) are used in Serializer/Deserializer (SerDes) systems. In such systems, a receiver (Rx) circuit often needs to be modeled for use in a SerDes system Channel Simulator based on the IBIS-AMI standard. This paper discussed techniques for extracting modeling data for a Rx continuous time linear equalizer (CTLE) circuit.… Continue Reading

Extracting Modeling Data for a Tx FFE Circuit

High speed digital (HSD) integrated circuits (ICs) are used in Serializer/Deserializer (SerDes) systems. In such systems, a transmit (Tx) circuit often needs to be modeled for use in a SerDes system Channel Simulator based on the IBIS-AMI standard. This paper discusses techniques for extracting modeling data for a Tx feed-forward equalizer (FFE) circuit. See the… Continue Reading

SerDes Channel Impulse Modeling with Signal Metrics

High speed digital (HSD) integrated circuits (ICs) are used in Serializer/Deserializer (SerDes) systems. In such systems, a lossy differential channel exists between the transmitter (Tx) circuit and the receiver (Rx) circuit. SerDes system are typically analyzed in a Channel Simulator. The channel is typically represented using S-Parameters. This paper was created with Signal Metrics LLC… Continue Reading

SerDes Channel Impulse Modeling with Rambus

High speed digital (HSD) integrated circuits (ICs) are used in Serializer/Deserializer (SerDes) systems. In such systems, a lossy differential channel exists between the transmitter (Tx) circuit and the receiver (Rx) circuit. SerDes system are typically analyzed in a Channel Simulator. The channel is typically represented using S-Parameters. This paper was created with Rambus Inc. during… Continue Reading

A New Method for Developing IBIS-AMI Models with Xilinx

High speed digital (HSD) serial-deserializer (SerDes) system channel simulation is critical for SerDes system design and validation. The simulation must run fast while achieving adequate accuracy. Today’s SerDes system vendors require HSD IBIS-AMI (Input/Output Buffer Information – Algorithmic Modeling Interface) models long before silicon is available. To meet the demand, HSD silicon vendors desire an… Continue Reading

404